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A list of all the posts and pages found on the site. For you robots out there, there is an XML version available for digesting as well.
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Posts
Future Blog Post
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Blog Post number 4
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Blog Post number 3
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Blog Post number 2
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Blog Post number 1
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portfolio
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publications
Dep-TEE: Decoupled Memory Protection for Secure and Scalable Inter-enclave Communication on RISC-V
Published in In the proceedings of Proceedings of the 30th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025
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Recommended citation: Shangjie Pan, Xuanyao Peng, Zeyuan Man, Xiquan Zhao, Dongrong Zhang, Bicheng Yang, Dong Du, Hang Lu, Yubin Xia, Xiaowei Li, "Dep-TEE: Decoupled Memory Protection for Secure and Scalable Inter-enclave Communication on RISC-V." In the proceedings of Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025.
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LayerTEE: Decoupled Memory Protection for Scalable Multi-Layer Communication on RISC-V
Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025
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Recommended citation: Shangjie Pan, Yinghao Yang, Xuanyao Peng, Xiquan Zhao, Dong Du, Hang Lu, Yubin Xia, Xiaowei Li, "LayerTEE: Decoupled Memory Protection for Scalable Multi-Layer Communication on RISC-V." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025.
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SecNPU: Securing LLM Inference on NPU
Published in In the proceedings of Proceedings of the 43rd IEEE International Conference on Computer Design (ICCD), 2025
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Recommended citation: Xuanyao Peng, Yinghao Yang, Shangjie Pan, Junjie Huang, Yujun Liang, Hang Lu, Fengwei Zhang, Xiaowei Li, "SecNPU: Securing LLM Inference on NPU." In the proceedings of Proceedings of the 43rd IEEE International Conference on Computer Design, 2025.
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talks
Talk 1 on Relevant Topic in Your Field
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Conference Proceeding talk 3 on Relevant Topic in Your Field
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This is a description of your conference proceedings talk, note the different field in type. You can put anything in this field.
teaching
OpenRVGPU Course
Undergraduate course — Teaching Assistant, RIOS, Tsinghua-Berkeley Shenzhen Institute(TBSI), 2025
This course is a fast-track, hands-on journey into designing open-source GPUs that combine the royalty-free RISC-V ISA with massively parallel graphics hardware. In ten intensive weeks students will move from ISA basics to a working RTL prototype, targeting the computational bottlenecks of large-language-model workloads. Get its slides on Github.